SOC Solution

Achieving the required performance using the lowest possible power is critical for every SoC design. Making sure the closure on performance and power are achieved in a time-frame as determined by market is key for success of a chip.

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AMS Solution

ICScape offers a complete Analog and Mixed-Signal design solution with a competitive set of tools that covers schematic/layout (AetherTM), circuit simulation(ALPSTM), physical verification (ArgusTM) and interconnect analysis (RCExplorerTM).

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IP Service

We offers high performance and low power interface IPs that has been proved in major foundries with the process 350nm to 28nm, and also offers IPs for SoC platforms like multimedia (Audio / Video) and Internet of Things (IoT) to achieve recent design demands. 

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EDACafe meet with

Dr. Jason Xing, CEO of ICScape 

ICScape: At the Junction of Math & CS, EDA & IP

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ICScape SPICE Simulator Chosen by Kilopass for

Pre- and Post-Layout Simulation of Memory IP

ICScape’s ALPS™ , an accurate, high-performance, high-capacity parallel SPICE circuit simulator, is a central  tool within Kilopass’ design flow to boost pre- and post-layout simulation performance and accelerate time to market.

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